Blogs
Finished pieces: essays, dev logs and post-mortems on hardware design, compilers and tooling. Study notes live in Archives.
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What Is Research, Really?
Not the paper at the end. A field guide to the part nobody photographs: the itch, the small question, the honest table, and the next question.
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macro_gen Dev Log #2: Sizing Combinational Logic by Logical Effort
macro_gen now sizes arbitrary combinational CMOS logic by logical effort, relative to the inverter characterized in part 1, and buffers outputs to log4(F) stages. Method with a fully worked example, calibration of the model constants, and a comparison against SPICE on eleven SKY130 benchmarks.
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macro_gen Dev Log #1: Teaching a Computer to Size an Inverter, Honestly
Part 1 of an ongoing series on macro_gen, an automated cell-characterization tool. Why automate this space, how today's sizing loop actually works in Rust, real ngspice results from varying Vinv, and where evolutionary search, game theory, and GNNs come in next.
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A Pragmatic Left-Shift Methodology: Tools & Techniques for Exploring and Building Domain-Specific SoCs
How to shift verification, exploration, and design entry left, catching bugs at spec time instead of silicon time.
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Scheduling, ILP, and a Bluespec Bug That Ate 64 GB of RAM
From the formal theory of scheduling in architectural synthesis to a production bug where an O(n²) ILP solver consumed 64 GB and 15 hours on 10,000 BVI signals.
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IP-XACT: The Hero We Need, the Villain We Deserve?
A deep dive into IP-XACT, exploring its role in modern SoC design and why it's both loved and feared by engineers.