Projects & publications

  • macro_gen: sizing standard cells by driving ngspice. Ongoing. Try it in the lab.
  • Hermes: generating on-chip networks in Bluespec from a spec. Ongoing.
  • PARISCV: profiling RISC-V applications to suggest custom instructions. OSCAR’24.
  • AntGen: generating patch antennas in HFSS. IEEE MAPCON’23.

Open Questions

The problems I keep returning to - still discovering, still forming.

  • Can physical constraints (placement, wire delay, congestion) be expressed as first-class parameters inside a hardware compiler, rather than deferred to back-end engineers?
  • Where is the right boundary between programmable processor and fixed accelerator - and can that boundary be determined algorithmically from application behavior?
  • Can we build scalable tools and methodologies that help us perform design-space exploration?

Why I do research

The longer version, on curiosity, courage and abstraction, is its own essay: On research →